Toggle navigation
Works
People
Organizations
Repositories
Pages
About
Statistics
Support
Sign In
Loading...
Loading...
Design and Implementation of Low power Carry Select Adder Using Transmission Gate Logic
https://doi.org/10.6084/m9.figshare.1425280
Loading...
Download Metadata
Cite as
APA
Harvard
MLA
Vancouver
Chicago
IEEE
Download Reports
Related Works (CSV)
Share
Email
Twitter
Facebook
Creators
Registration
Iosr Journals
Chandan Kumar Ray
K.Srinivasarao
DOI registered
May 27, 2015
via DataCite
Dataset published 2015 in
figshare Academic Research System
Dataset